The present invention relates generally to integrated circuit interconnects and in particular the present invention relates to driver circuits for integrated circuit interconnects.
Integrated circuits are fabricated to include multiple circuits performing different functions. These circuits are physically distributed across the integrated circuit and often need to communicate with each other. The communication, therefore, is accomplished using complex, and often long, interconnect lines, or buses.
Rapidly increasing integration density, in combination with on-die heat dissipation problems, has motivated a strong interest in exploring low-power/low-voltage circuit methodologies, while retaining high performance. As the integration density increases, major on-chip performance bottlenecks are experienced as a result of long point-to-point interconnects between and within an integrated circuit Functional Unit Blocks (FUB""s). This is primarily because interconnect capacitance per unit length, dominated by sidewall fringing and cross-coupling, increases with lateral dimension scaling.
Mixed (multiple) voltage swing based CMOS circuit techniques have been studied previously for high performance/low power on-chip data path interconnects. See for example Nakagome et al., xe2x80x9cSub-1-V Swing Internal Bus Architecture for Future Low-Power ULSI""sxe2x80x9d, IEEE Journal of Solid-State Circuits, April 1993, pp. 414-419, and Krishnamurthy et al., xe2x80x9cExploring the Design Space of Mixed Swing QuadRail for Low Power Digital Circuitsxe2x80x9d, IEEE Transactions on VLSI Systems, December 1997, pp. 388-400 for different mixed voltage swing based CMOS circuit techniques. The general principle behind these approaches is to suppress voltage swings across long interconnects by employing an additional pair of power supply rails (Vdd2 and Vss2). A driver circuit is used to receive an input signal and provides an output signal on internal interconnect lines. The output signal is limited to voltage swings between Vdd2 and Vss2. The voltage power rails, Vdd2 and Vss2, can be externally provided, or internally generated. For a given Vdd1 and Vss1, reducing the low voltage swing (Vdd2xe2x88x92Vss2) offers a nearly linear, to quadratic, reduction in interconnect power depending on how the additional pair of power rails are generated, eg., by employing on-chip series regulation or off-chip switching regulation techniques. Providing the additional voltage supply creates a burden, particularly in low-voltage circuits. This burden is created by both area penalty of generating the power supply and penalties in routing the addition power rails throughout the integrated circuit. Further, the additional power supply must provide the drive current needed to drive long bus lines. Thus, a low voltage, high current second power supply would be needed.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a driver circuit for on-chip interconnects which does not require an additional power supply, but reduces interconnect voltage swing and power consumption, while improving the speed performance of the interconnect.
The above mentioned problems with driving integrated circuit interconnects and other problems are addressed by the present invention, and will be understood by reading and studying the following specification. A signal driver circuit is described which uses one pair of voltage rails, or power supply connections to provide a low voltage swing signal for use in an integrated circuit.
In particular, an interconnect driver circuit comprising first series connected transistors coupled between voltage supply connections is described. The first series connected transistors drive a first voltage signal on a first interconnect in response to a data signal. The first voltage signal has a voltage swing which is less than a voltage differential between the voltage supply connections. Second series connected transistors are also coupled between the voltage supply connections. The second series connected transistors drive a second voltage signal on a second interconnect in response to a complement of the data signal, the second voltage signal has a voltage swing which is less than the voltage differential between the voltage supply connections. The interconnect driver circuit can also include tri-state circuitry coupled to the first and second series connected transistors for placing the first and second interconnects in a tri-state condition.
In another embodiment, an integrated circuit device comprises first and second differential interconnects, a receiver circuit connected to the first and second differential interconnects for detecting a differential voltage provided thereon, and a driver circuit connected to the first and second differential interconnects for providing the differential voltage. The driver circuit is connected to a single voltage supply, and the differential voltage has a voltage swing which is less than a voltage differential of the single voltage supply. The driver circuit comprises first and second series connected transistors coupled to the single voltage supply. The first series connected transistors drive a first voltage signal on the first interconnect in response to a data signal, and the second series connected transistors drive a second voltage signal on the second interconnect in response to a complement of the data signal. Tri-state circuitry is coupled to the first and second series connected transistors for placing the first and second interconnects in a tri-state condition.
A method is provided for communicating data in an integrated circuit using internal interconnects. The method comprises receiving a data signal, and providing differential voltage signals on a pair of interconnects in response to the data signal using a single pair of voltage rails. The differential voltage signals have a voltage swing which is less than a voltage differential of the single pair of voltage rails. The method also comprises detecting the differential voltage signals using a receiver circuit.